GL Communications – T1E1 Quad and Octal Analysis & Emulation Hardware

מאפיינים מרכזיים

GL's T1 E1 Quad and Octal Cards provide multiple ports for analyzing and emulating TDM networks. Multiple of these PCIe cards can be placed in a single server grade PC for enhanced scalability

 

  • Software Selectable T1 or E1 interfacing along with Drop and Insert
  • PCI Express x1 Lane/Board
  • Monitor the T1/E1 line conditions such as frame errors, violations, alarms, frequency, power level, and clock (or frame/bit) slips.
  • TDM, ISDN, SS7 – High Density Voice
  • Physical layer analysis includes ability to send alarms and errors via SNMP Traps
  • All protocol analyzers now include frame length in protocol statistics selection choice for data link layer
  • VoIP, Frame Relay, Multilink Frame Relay, PPP and Multilink PPP, HDLC
  • Most all “basic applications” and “special applications” are available for Quad and Octal T1 E1 cards
  • Comprehensive Analysis / Emulation of Voice, Data, Fax, Protocol, Analog, and Digital signals, including Echo and Voice Quality testing
  • Call Recording, Generation, and Monitoring for hundreds to thousands of calls in one platform
  • Windows and Linux Drivers for Open Source Applications
  • Media (VoIP) Gateway, IP PBX, and IVR Applications i.e. Asterisk (TM)
  • Routing and Bridging emulation over Multi T1/E1 WAN interfaces using MLPPP (Multi Link PPP) and MFR (Multi Link Frame relay) protocols
  • Supports “Cross-Port Through” and “Cross-Port Transmit” Modes – these configurations make cabling with Drop/Insert and Fail-Safe Inline Monitoring very easy
  • High Density and High Speed – The boards (with Direct Memory Access) are significantly faster and significantly more efficient
  • Octal boards are compatible with dual, quad, and higher core motherboards and software that simulate dual and quad cores (hyper-threading)
  •  Supports both 32-bit and 64-bit Windows® operating system
Physical Interface
T1/E1 Signal RJ48c Connectors – Four (4) or Eight (8) per board
PC Interface PCI Express X1 Lane
Compliant to PCI Express Base Specification v1.1
T1/E1 Line Interface
Line Code format AMI, B8ZS (T1) or HDB3 (E1)
Framing Formats Unframed, D4 (T1), ESF (T1), ESF (J1), CAS (E1), FAS (E1), CCS (E1), CRC4
BERT Pattern Generation Pseudorandom patterns: (63) 2ˆ6-1, (511) 2ˆ9-1, (2047) 2ˆ11-1, (32767) 2ˆ15-1, (1048575) 2ˆ20-1, (8388607) 2ˆ23-1, QRSS. T1 In-Band Loop Code Generation and Detection, Fixed patterns: All Ones, All Zeros, 1:1, 1:7, 3 in 24. Hardware Compliant: User pattern of up to 32 bits in length International, National & Extra Bits: User Defined (E1)
Display and Logging Bit Errors, Bit Error Rate, Error Seconds, Error Free Seconds, %EFS, Severely Error Seconds, % SES, Degraded Minutes, %Dmin, Loss Pattern Sync Count, Loss of Sync Seconds, Available Seconds, %Available Seconds, Unavailable Seconds, Bipolar Violations, BPV Rate, BPV Seconds, BPV Free Seconds, Frame Errors, FE Rate, FE Seconds, FE Free Seconds, with Detailed logging into disk file.

Resync In Progress, Loss of Signal, Blue Alarm, Change of Frame Alignment, Bipolar Violation, Frame Error, Carrier Loss, Yellow Alarm, Out of Frame Events Counter, Error Super frame Counter, Bipolar Violations, Remote Alarm, Distant Multiframe Alarm, Signaling All Ones, CAS Multiframe Error, CRC4 Error.

Drop and Insert Any Contiguous set of digital timeslots and/or audio input
Facility Data Link T1 ESF Mode: Transmit/Receive Messages, Bit-Oriented Messages, and files.
Loopbacks Normal (Outward and Inward)
Cross-Port Transmit Loopback
Cross-Port Through Loopback
Transmit
T1/E1 Interface Hardware Compliant:
ANSI: T1.403.1995, T1.231-1993, T1.408
AT&T: TR54016, TR62411
ITU: G.703, G.704, G.706, G.736, G.775, G.823, G.932, I.431, O.151, Q.161
ITU-T: Recommendation I.432-03/93 B-ISDN User-Network Interface-Physical Layer Specification
ETSI: ETS 300 011, ETS 300 166, ETS 300 233, CTR12, CRT4
Japanese: JTG.703, JTI.431, (Future enhancement – JJ-20.11 – CMI Coding Only)
T1 Output Level T1: 3.0V Base to Peak Selectable 0-655Ft Pulse Equalization Setting
E1 Output Level E1: 3.0V ±0.3V Base to Peak
Line Build-Out Selections 0dB, -7.5dB, -15dB, -22.5dB for T1 only
Tx Capability DSX-1 Outputs (to 655 feet)
Alarm Insertion Blue, Yellow, Remote, Distant Multiframe, Bit 7 Zero Suppression
D4 Yellow: 1 in S bit of frame 12
AIS-CI Code
ESF-RAI CI Code
Carrier Loss
Error Insertion BPV, Bit Error, Frame Error, CRC Errors, Burst Frames, Fixed Error Rate, Random Error Rate, auto logic from 10-2 to 10-9 for selectable 56K or 64Kps channels.
Internal Clock Specification Standard: ± 3ppm
Optional: ± 1ppm
Output Clock Source / Synchronization Options Internal, Recovered
Frequency offset OctalE1: +\- 615 Hz
OctalT1: +\- 464 Hz
Receive
Input Impedance 100 ohms for Terminate and monitor (T1)
120 ohms for Terminate and monitor (E1)
>1K ohms for Bridge
Terminations Terminate, Monitor, Bridge
T1 Input Frequency 1.544 MHz ± 20 Khz
E1 Input Frequency 2.048 Mhz ± 20 KHz
Frequency Measurement ± 1ppm
Error Detection Frame Error, CRC Error, CAS Mulitframe Error, BPV Error, Logic Error, Frame Alignment Error

  • 10 or 24 bits for sync time
  • 2/4, 2/5, or 2/6 frame bit in error frame select
  • Frame error bit corruption for 1 or 3 frame bits
  • E-Bit Error
  • Line Code Violation
  • Path Code Violation
Alarm Detection D4 Yellow Alarm, ESF Yellow Alarm
Hardware Compliant: J1 Yellow Alarm
Input Range

T1:
Terminate

  • 0 to 36 dB (Long haul)
  • Monitor
  • Bridge

Monitor

  • 26 dB +/- 2.5dB

E1:
Terminate

  • 0 to 43 dB (Long haul)
  • Monitor
  • Bridge

Monitor

  • 26 dB +/- 2.5dB
Intrinsic Jitter Jitter Tolerance: Meets AT&T TR 62411 (Dec. 90)and Meets ITU-T G.823
Jitter Transfer: Meets AT&T TR 62411 (Dec. 90)
PCM Interface
Transmit Synthesized Tone: 15 Hz to 3975 Hz selectable in 1Hz steps, +3.0 dBm to -40 dBm in 0.1 steps selectable, Frequency sweep.

Dual Tone: Single or any combination of tones. Supervision: User defined states of A, B, (C, D) bits.

Signaling: DTMF/MF Dialing Digits, ISDN, MFC-R2

File Playback: User created or recorded file.

Special Codes: Milliwatt Codes, CSU Loop Up/Down Codes.

Receive Displays for All Channels: Signaling Bits, Power Level, Frequency, and Data.

Graphical displays: Oscilloscope, Spectral, Spectrogram, Signal-to-Noise

Signaling: DTMF/MF Dialed Digit Detection and Analysis, ISDN, MFC-R2

Recorder: Record Full/Fractional T1/E1/J1 Timeslots to hard disk file.

Miscellaneous
Propagation Delay Simulation Up to 2 Seconds
Precision Delay Measurement Up to 8 Seconds
Physical Dimensions
Main Board 7.7 inches x 4.4 inches
PCIe X1 Connector Interface to PC
Daughter Board 3.8 inches x 4.2 inches
Without PC Interface